One of my top consulting clients is looking for a RTL Design - Application Developer in the Bay Area to work on contract with the following skillset:

Job Description:

• Work with researchers and architects doing RTL design.
• Use of tools such as Verilog, MatLab. Primary Skills: Design from conception to production.
• 2+ years of System Verilog OVM/UVM DV experience.
• Knowledge of RTL.
• Knowledge of digital ASICs design flows.
• Bachelor’s degree in Electrical Engineering or Computer Science or equivalent experience.

Nice to haves: ASIC verification backgound.